Neuromorphic computing is nowadays in the spotlight as it is a possible candidate to overcome the limitations of the Von Neuman architecture. In this talk we will discuss the use of the quasi-static and dynamic memdiode models for the realistic simulation of pattern recognition applications implemented with artificial neural networks (ANNs) based in large cross-point arrays (CPAs), involving up to 15k synaptic connections and 20k CMOS devices for the control electronics.
Firstly, we will discuss the memdiode model and then use it to fit experimental data obtained from resistive switching devices. It will be shown how, by following Chua’s memristive device theory, the concept of a diode with memory can be described with two equations: one equation for the electron transport based on the double-diode expression with series resistance and a second equation for the memory state of the device based on the hysteron structure. Secondly, we will describe the procedure followed to create, train and test the ANN and how it is further mapped into a CPA. The MNIST database of handwritten digits is used for demonstration purposes as it is widely accepted for testing machine learning systems.
Two different methods for mapping the ex-situ obtained synaptic weights are presented, one of them being the direct assignation of a given value of memory to each memdiode and the other the simulation of the entire process by which such a memory value is written to the memory state of the memdiode.For the resulting CPA based ANN, we will investigate how the memdiode electrical parameters, wire resistance value, image pixelation, and connection schemes including single and dual side connection and array partitioning affects the classification effectiveness, by using the confusion matrix. We will show that the simplicity, accuracy and robustness of the memdiode model makes it a suitable candidate for the simulation of large-scale neuromorphic circuits based on the vector-matrix multiplication method.
Hosted by Anna Palau, SUMAN group